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Garp: a MIPS processor with a reconfigurable coprocessor | ResearchHub
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Garp: a MIPS processor with a reconfigurable coprocessor
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Authors
John Hauser
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John Hauser
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John Wawrzynek
Published
November 23, 2002
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Topics
Computer Science
Hardware And Architecture
Computer Networks And Communications
Parallel Computing
Telecommunications
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DOI
10.1109/fpga.1997.624600