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Multilevel hypergraph partitioning: applications in VLSI ... | ResearchHub
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Multilevel hypergraph partitioning: applications in VLSI domain
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Authors
George Karypis
4 more
George Karypis
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Ritesh Agarwal
2 more
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Shashi Shekhar
Published
March 1, 1999
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Journal
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Topics
Computer Science
Discrete Mathematics
Mathematics
Electrical And Electronic Engineering
Computer Networks And Communications
Show all topics
DOI
10.1109/92.748202