Abstract

Most integrated Hall elements are isolated against other parts of an integrated circuit by a pn junction. This article presents a Hall element which is entirely enclosed by a dielectric boundary and therewith electrically isolated. The used technology is a standard CMOS process which includes processing steps of the wafer backside. Experiments with the Hall element show an absolute sensitivity of 48 mV T-1. The Hall element is surrounded by an integrated coil for test capabilities without external coil. This coil has a resistance of 19 Ω and an effectiveness of 96 mT A-1.